1. Field of the Invention
The present invention relates to chemical mechanical planarization (CMP), and more particularly to wafer carriers for reducing edge effects during wafer processing by CMP.
2. Description of the Related Art
Fabrication of semiconductor devices from semiconductor wafers generally requires, among others, chemical mechanical planarization (CMP), buffing, and cleaning of the wafers. Modem integrated circuit devices typically are formed in multi-level structures. At the substrate level, for example, transistor devices are formed. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistor devices to define the desired functional device. As is well known, patterned conductive features are insulated from each other by dielectric material, such as silicon dioxide, for example. As more metallization levels and associated dielectric layers are formed, the need to planarize the dielectric material increases. Without planarization, fabrication of additional metallization layers becomes substantially more difficult due to the higher variations in the surface topography. In other applications, metallization line patterns are formed in the dielectric material, and then metal CMP operations are performed to remove excessive metallization.
FIG. 1 shows a schematic diagram of a chemical mechanical planarization (CMP) process 100 performed on a semiconductor wafer 102. In this process 100, the wafer 102 undergoes a CMP process in a CMP system 104. Then, the semiconductor wafer 102 is cleaned in a wafer cleaning system 106. The semiconductor wafer 102 then proceeds to a post-CMP processing 108, where the wafer 102 undergoes different subsequent fabrication operations, including deposition of additional layers, sputtering, photolithography, and associated etching.
The CMP system 104 typically includes system components for handling and planarizing the surface topography of the wafer 102. Such components can be, for example, an orbital or rotational polishing pad, or a linear belt-polishing pad. The pad itself is typically made of an elastic polymeric material. For planarizing the surface topography of the wafer 102, the pad is put in motion and a slurry material is applied and spread over the surface of the pad. Once the pad with the slurry is moving at a desired rate, the wafer 102, which is mounted on a wafer carrier, is lowered onto the surface of the pad for planarizing the topography of the wafer surface.
In rotational or orbital CMP systems, a polishing pad is located on a rotating planar surface, and the slurry is introduced onto the polishing pad. In orbital tools the velocity is introduced via pad orbital motion and wafer carrier rotation and the slurry is introduced from underneath the wafer through multiple holes in the polishing pad. Through these processes, a desired wafer surface is polished to provide a smooth planar surface. The wafer is then provided to the wafer cleaning system 106 to be cleaned.
One of the main goals of CMP systems is to ensure the uniform removal rate distribution across the wafer surface. As is well known, the removal rate is defined by Preston""s equation: Removal Rate=KpPV, where the removal rate of material is a function of loading pressure P and relative velocity V. The term, Kp, is Preston Coefficient, which is a constant determined by the composition of the slurry, the process temperature, and the pad surface.
Unfortunately, conventional CMP systems often suffer from edge effects that redistribute the removal rate and thus the uniformity across the wafer surface. The edge effects typically result from boundary conditions between a wafer edge and a polishing pad during CMP processing. FIG. 2A shows a cross-sectional view of a static model of conventional edge effect between a section of the wafer 102 and a polishing pad 204. In this static model, a uniform pressure is exerted on the wafer 102 in the form of a downforce as indicated by vectors 206. This down force 206, however, causes a deformation, which is indicated by vectors 112, of the pad 204 that is essentially transversal (i.e., normal) but with a substantial longitudinal-transversal perturbation zone near the edge 208 of the wafer 102. Thus, this deformation results in a lower pressure zone 110 near the edge 208. The edge 208 of the wafer 102 causes high pressure as indicated by vectors 111, thereby producing non-uniform pressure areas near the edge 208.
The creation of alternating pressure zones leads to non-uniform removal rate across the wafer. FIG. 2B illustrates a cross-sectional view of a dynamic model of the edge effect between a section of the wafer 102 and the polishing pad 204. A section of a retaining ring 116 retains the wafer 102 in place to retain the wafer 102 in a wafer carrier (not shown) that controls the movement of the wafer 102. In this configuration, the wafer 102 is in motion relative to the polishing pad 204 as indicated by vector Vrel. The pad 204 is generally elastic. As the wafer 102 moves with the relative velocity Vrel over the pad 204, it thus causes elastic perturbation on the surface of the pad 204.
The translational motion of the wafer 102 and the elastic perturbation produce a longitudinal-transversal pad deformation wave on the surface 114 of the polishing pad 204 according to conventional wave generation theory. The deformation wave is typically a fast relaxing wave due to suppressive action of the extended wafer surface and the high viscosity of the pad material. This causes local redistribution of the loading and pressures near the edge 208 of the wafer 102. For example, low pressure zones 120, 122, and 124 are formed on the surface 114 of the pad 204 with progressively higher pressures relative to the distance from the edge 208 of the wafer 102.
Each of the low pressure zones 120, 122, and 124 is defined by local minimum and maximum pressure regions that cause uneven planarization of the surface topography. For example, the local minimum pressure region 126 of the low pressure zone 120 causes lower removal rates, resulting in local under-planarization of the surface topography. Conversely, the local maximum pressure region 128 of the low pressure zone 120 causes higher removal rates, resulting in local over-planarization of the surface topography. Thus, the overall planarization efficiency of the wafer 102 is substantially degraded.
Furthermore, in conventional CMP systems the frontal wave maximum produces sealing effect at the edge of a wafer that substantially reduces entry of slurry under the wafer. FIG. 2C shows a cross-sectional view of a sealing effect between a section of the wafer 102 and the polishing pad 204. The slurry is initially provided over the surface 114 of the polishing pad 204. As the wafer 102 moves with velocity Vrel relative to the polishing pad 204, the edge 208 of the wafer causes a high pressure as indicated by vector 152. This high pressure causes loading concentration of the slurry 150 at the edge 208 of the wafer 102, thereby restricting slurry transport underneath the wafer 102. In addition, high loading at the edge 208 may squeeze out the slurry out of pores and grooves of the polishing pad 204, creating slurry starvation conditions. As a result, internal sections of the wafer surface may not be provided with adequate amount of slurry for effective CMP processing.
Additionally, low pressure zones stimulate redeposition processes that can cause increased surface defectivity. Specifically, conventional CMP systems utilize dissolution and surface modification reactions, which are typically reducing volume type reactions stimulated by high pressure. In these reactions, pressure drops reverse the reaction, causing redeposition of dissolved by-products back to the wafer surface. Re-deposited material typically has uncontrollable composition and glues other particles to the wafer surface. This makes cleaning of the wafer substantially more difficult.
In view of the foregoing, what is needed is a wafer carrier that can minimize edge effects on a wafer during CMP processing while reducing slurry sealing effect.
Broadly speaking, the present invention fills these needs by providing a wafer carrier that provides uniform removal rates by masking the edge of a wafer to be polished. The wafer carrier allows a retainer ring and a wafer to independently align to the surface of a polishing pad to substantially eliminate detrimental edge and sealing effects. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device or a method. Several inventive embodiments of the present invention are described below.
In one embodiment, the present invention provides a wafer carrier for use with a chemical mechanical planarization apparatus. The wafer carrier includes a vacuum chuck and a retainer ring. The vacuum chuck is configured to hold and rotate a wafer for planarizing a surface topography of the wafer on a polishing pad. The vacuum chuck includes an inner region for holding the wafer and an outer region and further includes a groove adapted to decouple the inner region and the outer region. The inner and outer regions of the vacuum chuck are arranged to move independently in a direction orthogonal to a polishing surface of the polishing pad. The retainer ring is disposed on the outer region of the vacuum chuck and is configured to retain the wafer during CMP processing. In this configuration, the decoupled retainer ring and the wafer are arranged to move independently to align to the polishing surface of the polishing pad during CMP processing.
In another embodiment, a wafer carrier for use with a chemical mechanical planarization apparatus is disclosed. The wafer carrier includes a vacuum chuck and a retainer ring. The vacuum chuck is configured to hold and rotate a wafer for planarizing a surface topography of the wafer on a polishing pad and includes an inner region for holding the wafer and an outer region. The vacuum chuck is elastomeric and includes a groove adapted to decouple the inner region and the outer region. The inner and outer regions of the vacuum chuck are arranged to move independently in a direction orthogonal to a polishing surface of the polishing pad. The retainer ring is disposed on the outer region of the vacuum chuck and is configured to retain the wafer during CMP processing. The decoupled retainer ring and the wafer are arranged to move independently to align to a plane defining the polishing surface of the polishing pad during CMP processing.
In yet another embodiment, the present invention provides a wafer carrier for use with a chemical mechanical planarization apparatus. The wafer carrier includes a vacuum chuck, a retainer ring, and a vacuum port. The vacuum chuck is configured to hold and rotate a wafer for polishing the wafer on a polishing pad and includes an inner region for holding the wafer and an outer region. The vacuum chuck further includes a groove adapted to decouple the inner region and the outer region, wherein the inner and outer regions of the vacuum chuck are arranged to move independently of each other. The vacuum port is configured to provide a vacuum force to the vacuum chuck. The retainer ring is disposed on the outer region of the vacuum chuck and is configured to retain the wafer during CMP processing. In this configuration, the decoupled retainer ring and the wafer are arranged to move independently in a direction orthogonal to the polishing surface of the polishing pad such that the retainer ring and the wafer align to the polishing surface of the polishing pad.
Advantageously, the decoupled retainer ring effectively masks the edge of the wafer to minimize detrimental edge effects on the wafer during CMP processing and improves uniform removal rate. Preferably, the leading edge of the retaining is shaped in a rounded fashion to reduce the pressure so that the formation low pressure zones under the retaining ring 304 is minimized. This also minimizes the undesirable slurry sealing effect and further enhances uniform removal rate, thereby enhancing the uniform planarization of the wafer. Other aspects and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the present invention.